Electroplating may be used in integrated circuit manufacturing processes to form electrically conductive structures. For example, in a copper damascene process, electroplating is used to form copper lines and vias within channels previously etched into a dielectric layer. In one example of such a process, an electrically conductive seed layer is first deposited into the channels and on the substrate surface, for example, via physical vapor deposition. Then, electroplating is used to deposit a thicker copper layer over the seed layer such that the channels are completely filled. Excess copper is then removed by chemical mechanical polishing, thereby forming the individual copper features.
As integrated circuit fabrication technologies advance, thinner and thinner seed layers are being used for electroplating processes. However, the use of thin seed layers may pose problems with the plating of a uniform film over the seed layer. For example, thinner seed layers can lead to a larger voltage drop between the electrical contacts that provide current to the seed layer and portions of the seed layer that are remote from the contacts. Because electrical contacts are generally made to a seed layer on a wafer at locations adjacent to an outer edge of the wafer, a significant voltage drop may exist between the edge of the wafer and the center of the wafer due to the thinness of the seed layer. This may cause higher film growth rates near the wafer perimeter than near the wafer center.
Various approaches have been employed to overcome such difficulties. For example, in one approach, segmented anodes comprising two or more anode sections with separately controllable potentials relative to the wafer surface (e.g. cathode) have been proposed to dynamically control plating rates on different regions of the wafer surface. Other approaches involve controlling the chemistry of the plating solution, for example, to increase a charge transfer resistance at the wafer-electrolyte interface via copper complexing agents or charge transfer inhibitors, to increase a resistance of the electrolyte surface by reducing an ionic conductivity of the plating solution, etc. These chemical approaches attempt to increase the resistance of other components of the plating circuit to reduce the effects of the seed layer resistance. However, the seed layer resistance of a thinly seeded wafer may be too high for such approaches to be effective. Further, various other factors may affect the uniformity of an electroplated film, including but not limited to electrolyte current uniformity, ionic current uniformity, the presence of bubbles in the electrolyte, etc.